PDL for FM0+  Version1.0
Peripheral Driverl Library for FM0+
C:/pdl_v10/common/system_s6e1xx.h File Reference
#include <stdint.h>
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Defines

#define CLOCK_SETTING_NONE   0u
 Clock Setup macro definition.
#define CLOCK_SETTING_CMSIS   1u
#define CLOCK_SETUP   CLOCK_SETTING_CMSIS
#define __CLKMO   ( 4000000ul )
#define __CLKSO   ( 32768ul )
#define SCM_CTL_Val   0x0000005Bul
#define BSC_PSR_Val   0x00000000ul
#define APBC0_PSR_Val   0x00000000UL
#define APBC1_PSR_Val   0x00000080ul
#define SWC_PSR_Val   0x00000003ul
#define CSW_TMR_Val   0x0000005Cul
#define PSW_TMR_Val   0x00000000ul
#define PLL_CTL1_Val   0x00000001ul
#define PLL_CTL2_Val   0x00000009ul
#define HWWD_DISABLE   1
#define CR_TRIM_SETUP   1
#define __CLKHC   ( 4000000ul) /* Internal 4MHz CR Oscillator */
 Internal High-Speed CR Oscillator Frequency (in Hz, [value]ul) (USER SETTING)
#define __CLKLC   ( 100000ul) /* Internal 100KHz CR Oscillator */
 Internal Low-Speed CR Oscillator Frequency (in Hz, [value]ul) (USER SETTING)
#define __CLKMOMIN   ( 4000000ul)
 Any case minimum Main Clock frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __CLKMOMAX   ( 48000000ul)
 Maximum Main Clock frequency using external clock (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __CLKSOMIN   ( 32000ul)
 Any case minimum Sub Clock frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __CLKSOMAX   ( 100000ul)
 Maximum Sub Clock frequency using external clock (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __PLLCLKINMIN   ( 4000000ul)
 Absolute minimum PLL input frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __PLLCLKINMAX   ( 16000000ul)
 Absolute maximum PLL input frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __PLLCLKOUTMIN   (75000000ul)
 Absolute minimum PLL output oscillation frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __PLLCLKOUTMAX   (150000000ul)
 Absolute maximum PLL output oscillation frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define __HCLKMAX   (160000000ul)
 Absolute maximum System Clock frequency (HCLK) (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)
#define CHECK_RANGE(val, min, max)   (((val) < (min)) || ((val) > (max)))
 Preprocessor macro for checking range (clock settings).
#define CHECK_RSVD(val, mask)   ((val) & (mask))
 Preprocessor macro for checking bits with mask (clock settings). Prevents from setting reserved bits by mistake.
#define __PLLK   (((PLL_CTL1_Val >> 4ul) & 0x0Ful) + 1ul)
 Calculate PLL K factor from settings.
#define __PLLN   (((PLL_CTL2_Val ) & 0x3Ful) + 1ul)
 Calculate PLL N factor from settings.
#define __PLLM   (((PLL_CTL1_Val ) & 0x0Ful) + 1ul)
 Calculate PLL M factor from settings.
#define __PLLCLK   ((__CLKMO * __PLLN) / __PLLK)
 Calculate PLL output frequency from settings.
#define __MASTERCLK   (__PLLCLK)
 Define Master Clock from settings.
#define __HCLK   (__MASTERCLK / 1ul)
 Define System Clock Frequency (Core Clock) from settings.

Functions

void SystemInit (void)
 Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
void SystemCoreClockUpdate (void)
 Update the System Core Clock with current core Clock retrieved from cpu registers.

Variables

uint32_t SystemCoreClock

Detailed Description

Headerfile for FM0+ system clock parameters

History: 2013-12-06 0.1 Edison Zhang first version for FM0+ s6e1a1 series

Definition in file system_s6e1xx.h.


Define Documentation

#define __CLKHC   ( 4000000ul) /* Internal 4MHz CR Oscillator */

Internal High-Speed CR Oscillator Frequency (in Hz, [value]ul) (USER SETTING)

Definition at line 121 of file system_s6e1xx.h.

Referenced by SystemCoreClockUpdate().

#define __CLKLC   ( 100000ul) /* Internal 100KHz CR Oscillator */

Internal Low-Speed CR Oscillator Frequency (in Hz, [value]ul) (USER SETTING)

Definition at line 128 of file system_s6e1xx.h.

Referenced by SystemCoreClockUpdate().

#define __CLKMO   ( 4000000ul )

Definition at line 88 of file system_s6e1xx.h.

Referenced by Rtc_Init(), and SystemCoreClockUpdate().

#define __CLKMOMAX   ( 48000000ul)

Maximum Main Clock frequency using external clock (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 142 of file system_s6e1xx.h.

#define __CLKMOMIN   ( 4000000ul)

Any case minimum Main Clock frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 135 of file system_s6e1xx.h.

#define __CLKSO   ( 32768ul )

Definition at line 89 of file system_s6e1xx.h.

Referenced by Rtc_Init(), and SystemCoreClockUpdate().

#define __CLKSOMAX   ( 100000ul)

Maximum Sub Clock frequency using external clock (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 156 of file system_s6e1xx.h.

#define __CLKSOMIN   ( 32000ul)

Any case minimum Sub Clock frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 149 of file system_s6e1xx.h.

#define __HCLK   (__MASTERCLK / 1ul)

Define System Clock Frequency (Core Clock) from settings.

Definition at line 325 of file system_s6e1xx.h.

Referenced by Mfs_Csio_SetBaudRate(), Mfs_I2c_SetBaudRate(), Mfs_Lin_SetBaudRate(), and Mfs_Uart_SetBaudRate().

#define __HCLKMAX   (160000000ul)

Absolute maximum System Clock frequency (HCLK) (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 191 of file system_s6e1xx.h.

#define __MASTERCLK   (__PLLCLK)

Define Master Clock from settings.

Definition at line 311 of file system_s6e1xx.h.

#define __PLLCLK   ((__CLKMO * __PLLN) / __PLLK)

Calculate PLL output frequency from settings.

Definition at line 296 of file system_s6e1xx.h.

#define __PLLCLKINMAX   ( 16000000ul)

Absolute maximum PLL input frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 170 of file system_s6e1xx.h.

#define __PLLCLKINMIN   ( 4000000ul)

Absolute minimum PLL input frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 163 of file system_s6e1xx.h.

#define __PLLCLKOUTMAX   (150000000ul)

Absolute maximum PLL output oscillation frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 184 of file system_s6e1xx.h.

#define __PLLCLKOUTMIN   (75000000ul)

Absolute minimum PLL output oscillation frequency (in Hz, [value]ul) (DEVICE DEPENDENT SETTING)

Definition at line 177 of file system_s6e1xx.h.

#define __PLLK   (((PLL_CTL1_Val >> 4ul) & 0x0Ful) + 1ul)

Calculate PLL K factor from settings.

Definition at line 278 of file system_s6e1xx.h.

#define __PLLM   (((PLL_CTL1_Val ) & 0x0Ful) + 1ul)

Calculate PLL M factor from settings.

Definition at line 290 of file system_s6e1xx.h.

#define __PLLN   (((PLL_CTL2_Val ) & 0x3Ful) + 1ul)

Calculate PLL N factor from settings.

Definition at line 284 of file system_s6e1xx.h.

#define APBC0_PSR_Val   0x00000000UL

Definition at line 92 of file system_s6e1xx.h.

Referenced by SystemInit().

#define APBC1_PSR_Val   0x00000080ul
#define BSC_PSR_Val   0x00000000ul

Definition at line 91 of file system_s6e1xx.h.

Referenced by SystemInit().

#define CHECK_RANGE (   val,
  min,
  max 
)    (((val) < (min)) || ((val) > (max)))

Preprocessor macro for checking range (clock settings).

Returns:
0 Within range
1 Out of range

Definition at line 200 of file system_s6e1xx.h.

#define CHECK_RSVD (   val,
  mask 
)    ((val) & (mask))

Preprocessor macro for checking bits with mask (clock settings). Prevents from setting reserved bits by mistake.

Returns:
0 All bits within mask
1 One or more bits out of mask

Definition at line 210 of file system_s6e1xx.h.

#define CLOCK_SETTING_CMSIS   1u

Definition at line 75 of file system_s6e1xx.h.

#define CLOCK_SETTING_NONE   0u

Clock Setup macro definition.

  • 0: CLOCK_SETTING_NONE - User provides own clock setting in application
  • 1: CLOCK_SETTING_CMSIS - Clock setting done in system_s6e1a1.h like in FM0+ template projects

Definition at line 74 of file system_s6e1xx.h.

Definition at line 87 of file system_s6e1xx.h.

#define CR_TRIM_SETUP   1

Definition at line 100 of file system_s6e1xx.h.

#define CSW_TMR_Val   0x0000005Cul

Definition at line 95 of file system_s6e1xx.h.

Referenced by SystemInit().

#define HWWD_DISABLE   1

Definition at line 99 of file system_s6e1xx.h.

#define PLL_CTL1_Val   0x00000001ul

Definition at line 97 of file system_s6e1xx.h.

Referenced by SystemInit().

#define PLL_CTL2_Val   0x00000009ul

Definition at line 98 of file system_s6e1xx.h.

Referenced by SystemInit().

#define PSW_TMR_Val   0x00000000ul

Definition at line 96 of file system_s6e1xx.h.

Referenced by SystemInit().

#define SCM_CTL_Val   0x0000005Bul

Definition at line 90 of file system_s6e1xx.h.

Referenced by SystemInit().

#define SWC_PSR_Val   0x00000003ul

Definition at line 94 of file system_s6e1xx.h.

Referenced by SystemInit().


Function Documentation

void SystemCoreClockUpdate ( void  )

Update the System Core Clock with current core Clock retrieved from cpu registers.

Parameters:
none
Returns:
none

Definition at line 69 of file system_s6e1xx.c.

References __CLKHC, __CLKLC, __CLKMO, __CLKSO, and SystemCoreClock.

void SystemInit ( void  )

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Parameters:
none
Returns:
none

Definition at line 147 of file system_s6e1xx.c.

References APBC0_PSR_Val, APBC1_PSR_Val, BSC_PSR_Val, CSW_TMR_Val, PLL_CTL1_Val, PLL_CTL2_Val, PSW_TMR_Val, SCM_CTL_Val, and SWC_PSR_Val.


Variable Documentation

uint32_t SystemCoreClock

System Clock Frequency (Core Clock) Variable according CMSIS

Definition at line 60 of file system_s6e1xx.c.

Referenced by At24cxx_Delayms(), At24cxx_RandomRead(), I2cTxRxData(), Mfs_I2c_GenerateRestart(), Mfs_I2c_GenerateStart(), Mfs_I2c_GenerateStop(), and SystemCoreClockUpdate().