| PDL for FM0+ Version1.0 Peripheral Driverl Library for FM0+

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C:/pdl_v10/library/driver/ppg/ppg.h
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    00001 /*******************************************************************************
    00002 * Copyright (C) 2013 Spansion LLC. All Rights Reserved.
    00003 *
    00004 * This software is owned and published by:
    00005 * Spansion LLC, 915 DeGuigne Dr. Sunnyvale, CA  94088-3453 ("Spansion").
    00006 *
    00007 * BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
    00008 * BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
    00009 *
    00010 * This software contains source code for use with Spansion
    00011 * components. This software is licensed by Spansion to be adapted only
    00012 * for use in systems utilizing Spansion components. Spansion shall not be
    00013 * responsible for misuse or illegal use of this software for devices not
    00014 * supported herein.  Spansion is providing this software "AS IS" and will
    00015 * not be responsible for issues arising from incorrect user implementation
    00016 * of the software.
    00017 *
    00018 * SPANSION MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
    00019 * REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
    00020 * ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
    00021 * WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
    00022 * WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
    00023 * WARRANTY OF NONINFRINGEMENT.
    00024 * SPANSION SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
    00025 * NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
    00026 * LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
    00027 * LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
    00028 * INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
    00029 * INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
    00030 * SAVINGS OR PROFITS,
    00031 * EVEN IF SPANSION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
    00032 * YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
    00033 * INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
    00034 * FROM, THE SOFTWARE.
    00035 *
    00036 * This software may be replicated in part or whole for the licensed use,
    00037 * with the restriction that this Disclaimer and Copyright notice must be
    00038 * included with each copy of this software, whether used in part or whole,
    00039 * at all times.
    00040 */
    00041 /******************************************************************************/
    00051 #ifndef __PPG_H__
    00052 #define __PPG_H__
    00053
    00054 #include "mcu.h"
    00055 #include "pdl_user.h"
    00056
    00057 #if (defined(PDL_PERIPHERAL_PPG_ACTIVE))
    00058
    00138 /******************************************************************************
    00139  * Global type definitions
    00140  ******************************************************************************/
    00141 #define  PPG_CH0            0
    00142 #define  PPG_CH1            1
    00143 #define  PPG_CH2            2
    00144 #define  PPG_CH3            3
    00145 #define  PPG_CH4            4
    00146 #define  PPG_CH5            5
    00147 #define  PPG_CH6            6
    00148 #define  PPG_CH7            7
    00149 #define  PPG_CH8            8
    00150 #define  PPG_CH9            9
    00151 #define  PPG_CH10           10
    00152 #define  PPG_CH11           11
    00153 #define  PPG_CH12           12
    00154 #define  PPG_CH13           13
    00155 #define  PPG_CH14           14
    00156 #define  PPG_CH15           15
    00157 #define  PPG_CH16           16
    00158 #define  PPG_CH17           17
    00159 #define  PPG_CH18           18
    00160 #define  PPG_CH19           19
    00161 #define  PPG_CH20           20
    00162 #define  PPG_CH21           21
    00163 #define  PPG_CH22           22
    00164 #define  PPG_CH23           23
    00165
    00166 #define  PPG_COUPLE_CH01        0
    00167 #define  PPG_COUPLE_CH23        2
    00168 #define  PPG_COUPLE_CH45        4
    00169 #define  PPG_COUPLE_CH67        6
    00170 #define  PPG_COUPLE_CH89        8
    00171 #define  PPG_COUPLE_CH1011      10
    00172 #define  PPG_COUPLE_CH1213      12
    00173 #define  PPG_COUPLE_CH1415      14
    00174 #define  PPG_COUPLE_CH1617      16
    00175 #define  PPG_COUPLE_CH1819      18
    00176 #define  PPG_COUPLE_CH2021      20
    00177 #define  PPG_COUPLE_CH2223      22
    00178
    00179 #define  PPG_INT_MAX_CH     9  // Including channel.0,2,4,8,10,12,16,18,20
    00180
    00181 #define  PPG_UP_COUNTER_CH0     0
    00182 #define  PPG_UP_COUNTER_CH1     1
    00183 #define  PPG_UP_COUNTER_CH2     2
    00184
    00202 typedef enum en_ppg_opt_mode
    00203 {
    00204     Ppg8Bit8Bit = 0,
    00205     Ppg8Bit8Pres,
    00206     Ppg16Bit,
    00207     Ppg16Bit16Pres,
    00208
    00209 }en_ppg_opt_mode_t;
    00210
    00215 typedef enum en_ppg_clock
    00216 {
    00217     PpgPclkDiv1 = 0,
    00218     PpgPclkDiv4,
    00219     PpgPclkDiv16,
    00220     PpgPclkDiv64,
    00221
    00222 }en_ppg_clock_t;
    00223
    00228 typedef enum en_ppg_trig
    00229 {
    00230     PpgSoftwareTrig = 0,
    00231     PpgMftGateTrig,
    00232     PpgTimingGenTrig,
    00233
    00234 }en_ppg_trig_t;
    00235
    00240 typedef enum en_ppg_level
    00241 {
    00242     PpgNormalLevel = 0,
    00243     PpgReverseLevel,
    00244
    00245 }en_ppg_level_t;
    00246
    00251 typedef struct stc_ppg_config
    00252 {
    00253     en_ppg_opt_mode_t       enMode;
    00254     en_ppg_clock_t          enEvenClock;
    00255     en_ppg_clock_t          enOddClock;
    00256     en_ppg_level_t          enEvenLevel;
    00257     en_ppg_level_t          enOddLevel;
    00258     en_ppg_trig_t           enTrig;
    00259
    00260 }stc_ppg_config_t;
    00261
    00266 typedef enum en_ppg_gate_level
    00267 {
    00268     PpgGateHighActive = 0,
    00269     PpgGateLowActive,
    00270
    00271 }en_ppg_gate_level_t;
    00272
    00278 typedef enum en_ppg_upcnt_clk
    00279 {
    00280     PpgUpCntPclkDiv2 = 0,
    00281     PpgUpCntPclkDiv8,
    00282     PpgUpCntPclkDiv32,
    00283     PpgUpCntPclkDiv64,
    00284
    00285 }en_ppg_upcnt_clk_t;
    00286
    00291 typedef struct stc_ppg_upcnt0_config
    00292 {
    00293     en_ppg_upcnt_clk_t   enClk;
    00294     uint8_t              u8CmpValue0;
    00295     uint8_t              u8CmpValue2;
    00296     uint8_t              u8CmpValue4;
    00297     uint8_t              u8CmpValue6;
    00298
    00299 }stc_ppg_upcnt0_config_t;
    00300
    00305 typedef struct stc_timer0_gen_ch
    00306 {
    00307     boolean_t            bPpgCh0;
    00308     boolean_t            bPpgCh2;
    00309     boolean_t            bPpgCh4;
    00310     boolean_t            bPpgCh6;
    00311
    00312 }stc_timer0_gen_ch_t;
    00313
    00318 typedef struct stc_ppg_upcnt1_config
    00319 {
    00320     en_ppg_upcnt_clk_t   enClk;
    00321     uint8_t              u8CmpValue8;
    00322     uint8_t              u8CmpValue10;
    00323     uint8_t              u8CmpValue12;
    00324     uint8_t              u8CmpValue14;
    00325
    00326 }stc_ppg_upcnt1_config_t;
    00327
    00332 typedef struct stc_timer1_gen_ch
    00333 {
    00334     boolean_t            bPpgCh8;
    00335     boolean_t            bPpgCh10;
    00336     boolean_t            bPpgCh12;
    00337     boolean_t            bPpgCh14;
    00338
    00339 }stc_timer1_gen_ch_t;
    00340
    00345 typedef struct stc_ppg_upcnt2_config
    00346 {
    00347     en_ppg_upcnt_clk_t   enClk;
    00348     uint8_t              u8CmpValue16;
    00349     uint8_t              u8CmpValue18;
    00350     uint8_t              u8CmpValue20;
    00351     uint8_t              u8CmpValue22;
    00352
    00353 }stc_ppg_upcnt2_config_t;
    00354
    00359 typedef struct stc_timer2_gen_ch
    00360 {
    00361     boolean_t            bPpgCh16;
    00362     boolean_t            bPpgCh18;
    00363     boolean_t            bPpgCh20;
    00364     boolean_t            bPpgCh22;
    00365
    00366 }stc_timer2_gen_ch_t;
    00367
    00372 typedef enum en_ppg_int_mode
    00373 {
    00374     PpgHighUnderflow,
    00375     PpgHighAndLowUnderflow,
    00376
    00377 }en_ppg_int_mode_t;
    00378
    00383 typedef enum en_igbt_prohibition_mode
    00384 {
    00385     IgbtNormalMode = 0,
    00386     IgbtStopProhibitionMode,
    00387
    00388 }en_igbt_prohibition_mode_t;
    00389
    00394 typedef enum en_igbt_filter_width
    00395 {
    00396     IgbtNoFilter = 0,
    00397     IgbtFilter4Pclk,
    00398     IgbtFilter8Pclk,
    00399     IgbtFilter16Pclk,
    00400     IgbtFilter32Pclk,
    00401
    00402 }en_igbt_filter_width_t;
    00403
    00408 typedef enum en_igbt_level
    00409 {
    00410     IgbtLevelNormal = 0,
    00411     IgbtLevelInvert,
    00412
    00413 }en_igbt_level_t;
    00414
    00419 typedef struct stc_ppg_igbt_config
    00420 {
    00421     en_igbt_prohibition_mode_t  enMode;
    00422     en_igbt_filter_width_t      enWidth;
    00423     en_igbt_level_t             enTrigInputLevel;
    00424     en_igbt_level_t             enIgbt0OutputLevel;
    00425     en_igbt_level_t             enIgbt1OutputLevel;
    00426
    00427 }stc_ppg_igbt_config_t;
    00428
    00433 typedef enum en_ppg_irq_ch
    00434 {
    00435     PpgCh024,
    00436     PpgCh81012,
    00437     PpgCh161820,
    00438
    00439 }en_ppg_irq_ch_t;
    00440
    00441 /* C binding of definitions if building with C++ compiler */
    00442 #ifdef __cplusplus
    00443 extern "C"
    00444 {
    00445 #endif
    00446 /* 1. Init */
    00447 en_result_t Ppg_Init( uint8_t u8CoupleCh, stc_ppg_config_t *pstcConfig);
    00448 /* 2. Trigger configuration */
    00449 /* software */
    00450 en_result_t Ppg_StartSoftwareTrig(uint8_t u8Ch);
    00451 en_result_t Ppg_StopSoftwareTrig(uint8_t u8Ch);
    00452 /* MFT gate signal */
    00453 en_result_t Ppg_SelGateLevel(uint8_t u8EvenCh, en_ppg_gate_level_t enLevel);
    00454 /* Timing generator configuration */
    00455 en_result_t  Ppg_ConfigUpCnt0(stc_ppg_upcnt0_config_t* pstcConfig);
    00456 void  Ppg_StartUpCnt0(void);
    00457 en_stat_flag_t  Ppg_GetUpCnt0Status(void);
    00458 en_result_t  Ppg_DisableTimerGen0StartTrig(stc_timer0_gen_ch_t* pstcTimer0GenCh);
    00459
    00460 en_result_t  Ppg_ConfigUpCnt1(stc_ppg_upcnt1_config_t* pstcConfig);
    00461 void  Ppg_StartUpCnt1(void);
    00462 en_stat_flag_t  Ppg_GetUpCnt1Status(void);
    00463 en_result_t  Ppg_DisableTimerGen1StartTrig(stc_timer1_gen_ch_t* pstcTimer1GenCh);
    00464
    00465 en_result_t  Ppg_ConfigUpCnt2(stc_ppg_upcnt2_config_t* pstcConfig);
    00466 void  Ppg_StartUpCnt2(void);
    00467 en_stat_flag_t  Ppg_GetUpCnt2Status(void);
    00468 en_result_t  Ppg_DisableTimerGen2StartTrig(stc_timer2_gen_ch_t* pstcTimer2GenCh);
    00469 /* 3. Int */
    00470 #if (PDL_INTERRUPT_ENABLE_PPG == PDL_ON)
    00471 en_result_t  Ppg_EnableInt(uint8_t u8Ch, en_ppg_int_mode_t enIntMode, func_ptr_t pfnCallback);
    00472 en_result_t  Ppg_DisableInt(uint8_t u8Ch);
    00473 #endif
    00474 en_int_flag_t  Ppg_GetIntFlag(uint8_t u8Ch);
    00475 en_result_t  Ppg_ClrIntFlag(uint8_t u8Ch);
    00476 /* 4. H/L width set */
    00477 en_result_t  Ppg_SetLevelWidth(uint8_t u8Ch, uint8_t u8LowWidth, uint8_t u8HighWidth);
    00478 /* 5. IGBT mode */
    00479 en_result_t  Ppg_InitIgbt(stc_ppg_igbt_config_t* pstcPpgIgbt);
    00480 void Ppg_EnableIgbtMode(void);
    00481 void Ppg_DisableIgbtMode(void);
    00482 /* 6. IRQ handler */
    00483 void Ppg_IrqHandler(void);
    00484
    00485 #ifdef __cplusplus
    00486 }
    00487 #endif
    00488
    00489 #endif
    00490
    00491 #endif