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C:/pdl_v10/common/system_s6e1xx.h
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    00001 /*******************************************************************************
    00002 * Copyright (C) 2013 Spansion LLC. All Rights Reserved.
    00003 *
    00004 * This software is owned and published by:
    00005 * Spansion LLC, 915 DeGuigne Dr. Sunnyvale, CA  94088-3453 ("Spansion").
    00006 *
    00007 * BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
    00008 * BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
    00009 *
    00010 * This software contains source code for use with Spansion
    00011 * components. This software is licensed by Spansion to be adapted only
    00012 * for use in systems utilizing Spansion components. Spansion shall not be
    00013 * responsible for misuse or illegal use of this software for devices not
    00014 * supported herein.  Spansion is providing this software "AS IS" and will
    00015 * not be responsible for issues arising from incorrect user implementation
    00016 * of the software.
    00017 *
    00018 * SPANSION MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
    00019 * REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
    00020 * ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
    00021 * WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
    00022 * WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
    00023 * WARRANTY OF NONINFRINGEMENT.
    00024 * SPANSION SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
    00025 * NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
    00026 * LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
    00027 * LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
    00028 * INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
    00029 * INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
    00030 * SAVINGS OR PROFITS,
    00031 * EVEN IF SPANSION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
    00032 * YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
    00033 * INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
    00034 * FROM, THE SOFTWARE.
    00035 *
    00036 * This software may be replicated in part or whole for the licensed use,
    00037 * with the restriction that this Disclaimer and Copyright notice must be
    00038 * included with each copy of this software, whether used in part or whole,
    00039 * at all times.
    00040 */
    00041 /******************************************************************************/
    00050 #ifndef _SYSTEM_S6E1XX_H_
    00051 #define _SYSTEM_S6E1XX_H_
    00052
    00053 #ifdef __cplusplus
    00054 extern "C" {
    00055 #endif
    00056
    00057 /******************************************************************************/
    00058 /* Include files                                                              */
    00059 /******************************************************************************/
    00060 #include <stdint.h>
    00061
    00062 /******************************************************************************/
    00063 /* Global pre-processor symbols/macros ('define')                             */
    00064 /******************************************************************************/
    00065
    00074 #define CLOCK_SETTING_NONE  0u
    00075 #define CLOCK_SETTING_CMSIS 1u
    00076
    00077 /******************************************************************************/
    00078 /*                                                                            */
    00079 /*                      START OF USER SETTINGS HERE                           */
    00080 /*                      ===========================                           */
    00081 /*                                                                            */
    00082 /*                 All lines with '<<<' can be set by user.                   */
    00083 /*                                                                            */
    00084 /******************************************************************************/
    00085
    00086 #if (PDL_DEVICE_TYPE == PDL_TYPE1)
    00087 #define CLOCK_SETUP           CLOCK_SETTING_CMSIS  // <<< Define clock setup macro here
    00088 #define __CLKMO              ( 4000000ul )         // <<< External   4MHz Crystal
    00089 #define __CLKSO              ( 32768ul )           // <<<  External  32KHz Crystal
    00090 #define SCM_CTL_Val           0x0000005Bul         // <<< Define SCM_CTL here
    00091 #define BSC_PSR_Val           0x00000000ul         // <<< Define BSC_PSR here
    00092 #define APBC0_PSR_Val         0x00000000UL         // <<< Define APBC0_PSR here
    00093 #define APBC1_PSR_Val         0x00000080ul         // <<< Define APBC1_PSR here
    00094 #define SWC_PSR_Val           0x00000003ul         // <<< Define SWC_PSR here
    00095 #define CSW_TMR_Val           0x0000005Cul         // <<< Define CSW_TMR here
    00096 #define PSW_TMR_Val           0x00000000ul         // <<< Define PSW_TMR here
    00097 #define PLL_CTL1_Val          0x00000001ul         // <<< Define PLL_CTL1 here
    00098 #define PLL_CTL2_Val          0x00000009ul         // <<< Define PLL_CTL2 here
    00099 #define HWWD_DISABLE          1   // <<< Define HW Watach dog enable here
    00100 #define CR_TRIM_SETUP         1   // <<< Define CR trimming at startup enable here
    00101 #else
    00102 #error Device Type not found!
    00103 #endif
    00104
    00105 /******************************************************************************/
    00106 /*                                                                            */
    00107 /*                         END OF USER SETTINGS HERE                          */
    00108 /*                         =========================                          */
    00109 /*                                                                            */
    00110 /******************************************************************************/
    00111
    00112 /******************************************************************************/
    00113 /* Device dependent System Clock absolute maximum ranges                      */
    00114 /******************************************************************************/
    00115
    00121 #define __CLKHC        ( 4000000ul)         /* Internal   4MHz CR Oscillator  */
    00122
    00128 #define __CLKLC        (  100000ul)         /* Internal 100KHz CR Oscillator  */
    00129
    00135 #define __CLKMOMIN    (  4000000ul)
    00136
    00142 #define __CLKMOMAX    ( 48000000ul)
    00143
    00149 #define __CLKSOMIN    (    32000ul)
    00150
    00156 #define __CLKSOMAX    (   100000ul)
    00157
    00163 #define __PLLCLKINMIN (  4000000ul)
    00164
    00170 #define __PLLCLKINMAX ( 16000000ul)
    00171
    00177 #define __PLLCLKOUTMIN (75000000ul)
    00178
    00184 #define __PLLCLKOUTMAX (150000000ul)
    00185
    00191 #define __HCLKMAX     (160000000ul)
    00192
    00200 #define CHECK_RANGE(val, min, max)          (((val) < (min)) || ((val) > (max)))
    00201
    00210 #define CHECK_RSVD(val, mask)                ((val) & (mask))
    00211
    00212
    00213 /******************************************************************************/
    00214 /* Check register settings                                                    */
    00215 /******************************************************************************/
    00216 #if (CHECK_RSVD((SCM_CTL_Val),    ~0x000000FBul))
    00217    #error "SCM_CTL: Invalid values of reserved bits!"
    00218 #endif
    00219
    00220 #if ((SCM_CTL_Val & 0xE0ul) == 0x00ul) && ((SCM_CTL_Val & 0x01ul) != 0x01ul)
    00221    #error "SCM_CTL: High-speed CR mode is selected but HCR is not enabled!"
    00222 #endif
    00223
    00224 #if ((SCM_CTL_Val & 0xE0ul) == 0x20ul) && ((SCM_CTL_Val & 0x02ul) != 0x02ul)
    00225    #error "SCM_CTL: Main ocsillator mode is selected but MOSC is not enabled!"
    00226 #endif
    00227
    00228 #if ((SCM_CTL_Val & 0xE0ul) == 0xA0ul) && ((SCM_CTL_Val & 0x08ul) != 0x08ul)
    00229    #error "SCM_CTL: sub ocsillator mode is selected but SOSC is not enabled!"
    00230 #endif
    00231
    00232 #if ((SCM_CTL_Val & 0xE0ul) == 0x40ul) && ((SCM_CTL_Val & 0x03ul) == 0x00ul)
    00233    #error "SCM_CTL: CLKPLL is selected but MOSC or HCR is not enabled!"
    00234 #endif
    00235
    00236 #if ((SCM_CTL_Val & 0xE0ul) == 0x40ul) && ((SCM_CTL_Val & 0x10ul) != 0x10ul)
    00237    #error "SCM_CTL: CLKPLL is selected but PLL is not enabled!"
    00238 #endif
    00239
    00240 #if ((SCM_CTL_Val & 0x10ul))       /* if PLL is used */
    00241   #if (CHECK_RSVD((PSW_TMR_Val),  ~0x00000017ul))
    00242      #error "PSW_TMR: Invalid values of reserved bits!"
    00243   #endif
    00244
    00245   #if (CHECK_RSVD((PLL_CTL1_Val), ~0x000000FFul))
    00246      #error "PLL_CTL1: Invalid values of reserved bits!"
    00247   #endif
    00248
    00249   #if (CHECK_RSVD((PLL_CTL2_Val), ~0x0000003Ful))
    00250     #error "PLL_CTL2: Invalid values of reserved bits!"
    00251   #endif
    00252 #endif
    00253
    00254 #if (CHECK_RSVD((BSC_PSR_Val),    ~0x00000007ul))
    00255   #error "BSC_PSR: Invalid values of reserved bits!"
    00256 #endif
    00257
    00258 #if (CHECK_RSVD((APBC0_PSR_Val),  ~0x00000003ul))
    00259   #error "APBC0_PSR: Invalid values of reserved bits!"
    00260 #endif
    00261
    00262 #if (CHECK_RSVD((APBC1_PSR_Val),  ~0x00000083ul))
    00263   #error "APBC1_PSR: Invalid values of reserved bits!"
    00264 #endif
    00265
    00266 #if (CHECK_RSVD((SWC_PSR_Val),    ~0x00000003ul))
    00267   #error "SWC_PSR: Invalid values of reserved bits!"
    00268 #endif
    00269
    00270 /******************************************************************************/
    00271 /* Define clocks with checking settings                                       */
    00272 /******************************************************************************/
    00273
    00278 #define __PLLK         (((PLL_CTL1_Val >> 4ul) & 0x0Ful) + 1ul)
    00279
    00284 #define __PLLN         (((PLL_CTL2_Val     ) & 0x3Ful) + 1ul)
    00285
    00290 #define __PLLM         (((PLL_CTL1_Val     ) & 0x0Ful) + 1ul)
    00291
    00296 #define __PLLCLK       ((__CLKMO  * __PLLN) / __PLLK)
    00297
    00298 /******************************************************************************/
    00299 /* Determine core clock frequency according to settings                       */
    00300 /******************************************************************************/
    00301
    00306 #if   (((SCM_CTL_Val >> 5ul) & 0x07UL) == 0ul)
    00307   #define __MASTERCLK     (__CLKHC)
    00308 #elif (((SCM_CTL_Val >> 5ul) & 0x07UL) == 1ul)
    00309   #define __MASTERCLK     (__CLKMO)
    00310 #elif (((SCM_CTL_Val >> 5ul) & 0x07UL) == 2ul)
    00311   #define __MASTERCLK     (__PLLCLK)
    00312 #elif (((SCM_CTL_Val >> 5ul) & 0x07UL) == 4ul)
    00313   #define __MASTERCLK     (__CLKLC)
    00314 #elif (((SCM_CTL_Val >> 5ul) & 0x07UL) == 5ul)
    00315   #define __MASTERCLK     (__CLKSO)
    00316 #else
    00317   #define __MASTERCLK     (0UL)
    00318 #endif
    00319
    00324 #if   ((BSC_PSR_Val & 0x07UL) == 0ul)
    00325   #define __HCLK         (__MASTERCLK / 1ul)
    00326 #elif ((BSC_PSR_Val & 0x07UL) == 1ul)
    00327   #define __HCLK         (__MASTERCLK / 2ul)
    00328 #elif ((BSC_PSR_Val & 0x07UL) == 2ul)
    00329   #define __HCLK         (__MASTERCLK / 3ul)
    00330 #elif ((BSC_PSR_Val & 0x07UL) == 3ul)
    00331   #define __HCLK         (__MASTERCLK / 4ul)
    00332 #elif ((BSC_PSR_Val & 0x07UL) == 4ul)
    00333   #define __HCLK         (__MASTERCLK / 6ul)
    00334 #elif ((BSC_PSR_Val & 0x07UL) == 5ul)
    00335   #define __HCLK         (__MASTERCLK / 8ul)
    00336 #elif ((BSC_PSR_Val & 0x07UL) == 6ul)
    00337   #define __HCLK         (__MASTERCLK /16ul)
    00338 #else
    00339   #define __HCLK         (0ul)
    00340 #endif
    00341
    00342 /******************************************************************************/
    00343 /* HCLK range check                                                           */
    00344 /******************************************************************************/
    00345 #if (CHECK_RANGE(__CLKMO, __CLKMOMIN, __CLKMOMAX))
    00346   #error "Main Oscillator Clock (CLKMO) out of range!"
    00347 #endif
    00348
    00349 #if (CHECK_RANGE(__CLKSO, __CLKSOMIN, __CLKSOMAX))
    00350   #error "Sub Oscillator Clock (CLKMO) out of range!"
    00351 #endif
    00352
    00353 #if (CHECK_RANGE((__CLKMO / __PLLK), __PLLCLKINMIN, __PLLCLKINMAX))
    00354   #error "PLL input frequency out of range!"
    00355 #endif
    00356
    00357 #if (CHECK_RANGE(((__CLKMO * __PLLN * __PLLM) / __PLLK), __PLLCLKOUTMIN, __PLLCLKOUTMAX))
    00358   #error "PLL oscillation frequency out of range!"
    00359 #endif
    00360
    00361 #if (CHECK_RANGE(__HCLK, 0UL, __HCLKMAX))
    00362   #error "System Clock (HCLK) out of range!"
    00363 #endif
    00364
    00365
    00366
    00367 /******************************************************************************/
    00368 /* Global function prototypes ('extern', definition in C source)              */
    00369 /******************************************************************************/
    00370
    00371 extern uint32_t SystemCoreClock;          // System Clock Frequency (Core Clock)
    00372
    00373 extern void SystemInit (void);            // Initialize the system
    00374
    00375 extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
    00376
    00377 #ifdef __cplusplus
    00378 }
    00379 #endif
    00380
    00381 #endif /* _SYSTEM_S6E1XX_H_ */